Design and Implementation of Multi-rate, Multiplier free DSP algorithm Based Digital Receiver
نویسندگان
چکیده
The paper presents design, analysis, simulation and implementation of digital signal processing (DSP) based multi-rate multiplier free digital receiver in hardware. The digital receiver consists of digital down converter, CIC filter and PM/FM demodulator and is dealt in detail. The digital receiver design for PM/ FM signals is simulated in MATLAB Simulink®, finite word length effect is analyzed with bit true simulation, the same were implemented in hardware. The whole design is accommodated in a Xilinx xc4vsx35-10ff668 FPGA. The design is tested in real time for different frequencies and deviations simulation results are presented here. Apart from the implementation, paper describes the mathematical modeling of digital receiver. The paper high lights selection of digital receiver architecture and multiplier free algorithms.
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تاریخ انتشار 2014